c++ - why fetch_add uses lock prefix while fetch_and uses cmpxchg in boost atomics -

i noticed in boost::atomics library x86 implementation (one, not use compiler intrinsics) of fetch_add uses add instruction lock prefix:

static boost_forceinline storage_type fetch_add(storage_type volatile& storage, storage_type v, memory_order) boost_noexcept {     __asm__ __volatile__     (         "lock; xaddw %0, %1"         : "+q" (v), "+m" (storage)         :         : boost_atomic_detail_asm_clobber_cc_comma "memory"     );     return v; } 

while fetch_and, fetch_or , fetch_xor implemented through cas instruction:

#define boost_atomic_detail_cas_loop(op, argument, result)\     __asm__ __volatile__\     (\         "xor %%" boost_atomic_detail_temp_cas_register ", %%" boost_atomic_detail_temp_cas_register "\n\t"\         ".align 16\n\t"\         "1: movw %[arg], %%dx\n\t"\         op " %%ax, %%dx\n\t"\         "lock; cmpxchgw %%dx, %[storage]\n\t"\         "jne 1b"\         : [res] "+a" (result), [storage] "+m" (storage)\         : [arg] "q" (argument)\         : boost_atomic_detail_asm_clobber_cc_comma boost_atomic_detail_temp_cas_register, "memory"\     )  static boost_forceinline storage_type fetch_and(storage_type volatile& storage, storage_type v, memory_order) boost_noexcept {     storage_type res = storage;     boost_atomic_detail_cas_loop("andw", v, res);     return res; } 

any ideas why so? because cannot use lock prefix bitwise operations (not true, far know)?

as jester points out, fetch_add uses xadd instruction return value preceding effects of function. there no xand or xor instructions, cas used.